Open source IP core library

 

AES IP core

This AES IP core implements an open source* hardware data encryption/decryption using Rijndael encoding in compliance with the FIPS-197 Advanced Encryption Standard (AES). Three versions are available, they correspond to the implementation of various cipher key size 128, 192, and 256 bits :

  1. aes_128.zip

  2. aes_192.zip

  3. aes_256.zip

(*) AES IP cores by Rachid DAFALI is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 3.0 Unported License.

Please feel free to contact me if you want to use the AES IP core in other terms than those listed in the current license

Figure 2: these waveforms represents the simulation of the AES key expansion

Figure 1 : these waveforms represents the simulation of data encryption and decryption

AES IP core :

  1. includes the key expansion function (figure 2).

  2. performs in parallel data encryption and decryption (figure 1).

  3. based on a pipelined architecture.

  4. fully functional and synthesizable.

  5. fully synchronous.

  6. includes NIST FIPS-197 validation testbench.

Features

Performance

AES IP core encrypt and decrypt 128 bits per clock cycle.

Xilinx FPGA xc7vh290t-1hcg1155.

ISE 14.2.

Implementation

AES 128

AES 192

AES 256

Frequency (MHz)

185

189

184

Throughput (Gbits/s)

23,68

24,19

23,55